AMD and Hammer Distribution are promoting a CPU‑first approach to AI infrastructure in the UK, arguing that power constraints are now the primary barrier to deployment. The companies say grid connection delays have become the biggest blocker to new data‑centre capacity, with recent Ofgem and National Energy System Operator (NESO) reforms shifting priority toward projects that are efficient and ready to build.
Under the UK's “First Ready, First Connected” rules introduced in December 2025, more than 300GW of stalled or non‑viable projects were removed from the UK grid queue. Government papers on AI Growth Zones also identify grid capacity as the largest obstacle to expansion. Hammer and AMD argue that this environment makes system level efficiency a critical factor in determining whether AI projects can proceed.
While GPUs dominate AI training, the companies highlight that CPUs govern data ingest, orchestration and inference throughput. They say mismatched hardware and unnecessary accelerators waste power in a market where energy availability is now a hard limit. AMD’s guidance indicates that EPYC processors can support CPU‑based inference for models up to 20B parameters, making them suitable for workloads such as document processing, retrieval‑augmented search and summarisation.
The companies position CPU‑led inference as a way to reduce reliance on accelerators, lower total power consumption and deploy AI on existing infrastructure without waiting for grid upgrades. The strategy aligns with new European Energy Efficiency Directive requirements, which introduce mandatory reporting for datacentre performance and place greater emphasis on “useful work per watt” as a measurable KPI.
KitGuru Says: AMD's EPYC processors have been gaining ground in the datacentre market. With new rules coming into place to govern the amount of stress AI datacentres can put on the grid, AMD wants to be at the forefront.
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