PCI-SIG publishes planned specs for PCIe 8.0

Just as the PC industry is getting its footing with PCIe 5.0, and with the ink barely dry on the PCIe 7.0 specification, the PCI-SIG has just announced its targets for the next-generation interface. With PCIe 8.0, PCI-SIG continues the relentless trend of doubling the available bandwidth with every single iteration.

PCI-SIG is targeting a data rate of 64 GB/s per lane. For context, a full x16 slot, like the one your graphics card uses, would have a theoretical maximum bandwidth of 1 terabyte per second. That's more raw throughput than the VRAM of a top-end GeForce RTX 5080 can currently deliver, and an 800% increase over the PCIe 5.0 standard found in today's high-end PCs.

This announcement comes just a couple of months after the PCIe 7.0 specification was finalised. It's expected that PCIe 8.0 will continue to use the PAM4 signaling method that was introduced with PCIe 6.0, allowing for double the amount of data to be transferred per signal event compared to the older NRZ signaling used in PCIe 5.0 and earlier. This way, it's possible to increase bandwidth without having to crank up clock speeds to unmanageable levels.

PCI-SIG is aiming to finalise the specification in 2028, and it will likely be the early 2030s before we see it in consumer desktop PCs. The initial press release makes it clear that the first targets for this technology are applications like AI, high-speed networking, and quantum computing, with gaming not getting a single mention.

KitGuru says: When are you expecting to get your first PCIe 8.0-based devices?

The post PCI-SIG publishes planned specs for PCIe 8.0 first appeared on KitGuru.

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